RD_MODE_STATUS=RD_MODE_STATUS_0, WAIT=WAIT_0, RD_MODE=RD_MODE_0
Bank1 Read Control Register
RD_MODE | Flash read mode control setting for Bank 0 0 (RD_MODE_0): Normal read mode 1 (RD_MODE_1): Read Margin 0 2 (RD_MODE_2): Read Margin 1 3 (RD_MODE_3): Program Verify 4 (RD_MODE_4): Erase Verify 5 (RD_MODE_5): Leakage Verify 9 (RD_MODE_9): Read Margin 0B 10 (RD_MODE_10): Read Margin 1B |
BUFI | Enables read buffering feature for instruction fetches to this Bank |
BUFD | Enables read buffering feature for data reads to this Bank |
WAIT | Number of wait states for read 0 (WAIT_0): 0 wait states 1 (WAIT_1): 1 wait states 2 (WAIT_2): 2 wait states 3 (WAIT_3): 3 wait states 4 (WAIT_4): 4 wait states 5 (WAIT_5): 5 wait states 6 (WAIT_6): 6 wait states 7 (WAIT_7): 7 wait states 8 (WAIT_8): 8 wait states 9 (WAIT_9): 9 wait states 10 (WAIT_10): 10 wait states 11 (WAIT_11): 11 wait states 12 (WAIT_12): 12 wait states 13 (WAIT_13): 13 wait states 14 (WAIT_14): 14 wait states 15 (WAIT_15): 15 wait states |
RD_MODE_STATUS | Read mode 0 (RD_MODE_STATUS_0): Normal read mode 1 (RD_MODE_STATUS_1): Read Margin 0 2 (RD_MODE_STATUS_2): Read Margin 1 3 (RD_MODE_STATUS_3): Program Verify 4 (RD_MODE_STATUS_4): Erase Verify 5 (RD_MODE_STATUS_5): Leakage Verify 9 (RD_MODE_STATUS_9): Read Margin 0B 10 (RD_MODE_STATUS_10): Read Margin 1B |